Top IITs, NIT Rourkela and Saveetha Engineering College to lead in India’s chip design to solve real life problems

Newdelhi:20/3/25:Recognizing semiconductor design as a strategic imperative, the Ministry of Electronics and Information Technology (MeitY) is spearheading a comprehensive transformation of India’s chip design ecosystem. Through a series of graded and proactive initiatives, MeitY is systematically revamping semiconductor design processes across more than 300 organizations, including 250 academic institutions and 65 start-ups. This initiative aims to democratize chip design, fostering an environment where talent from any corner of the country can contribute to India’s semiconductor innovation. Aligning with the vision of Hon’ble Prime Minister Shri Narendra Modi that ‘Design in India is as important as Make in India’, MeitY is set to usher in a new era of creative empowerment in chip design.

About C2S Programme

The Chips to Start-up (C2S) Programme is a flagship initiative by the Ministry of Electronics and Information Technology (MeitY) aimed at strengthening India’s semiconductor design ecosystem. Aims to generate 85,000 number of industry-ready manpower at BTech, MTech, and PhD levels specialized in semiconductor chip design.The Programme takes a comprehensive approach by offering students complete hands-on experience in chip design, fabrication, and testing. This is achieved through regular training sessions, conducted in collaboration with industry partners, and by providing mentorship and access to chip design, fabrication & testing resources to students, including EDA tools, access to semiconductor foundries for fabricating their chips, etc. These opportunities include implementing the R&D projects for development of working prototypes of ASICs, SoC,s and IP Core designs.

ChipIN Centre

ChipIN Centre has been setup under C2S Programme as one of the largest facilities established at C-DAC, aims to bring the chip design infrastructure at door-steps of semiconductor design community in the country. It is a centralized design facility, not only hosting the most advanced tools for entire chip design cycle going up to 5nm or advanced node but also provide aggregate services for fabrication of design at foundries and packaging.

 

Shri Ashwini Vaishnaw, made the announcements

Under C2S Programme, following announcements were made by Hon’ble Minister- Shri Ashwini Vaishnaw with august presence of Secretary- Shri Krishnan, Additional Secretary- Shri Abhishek Singh, and Group Coordinator- Smt Sunita Verma, MeitY on 20^th March 2025.

After intense rounds of coding, design challenges, and expert-led training, 40 elite teams, 200 innovators battled it out in the Grand Finale of the 100-hour deep-tech “Analog and Digital Hackathons” launched in partnership of AMD, Synopsys, and CoreEL Technologies. Armed with EDA & cloud resources, they tackled real-world problems—enhancing LIVE image processing on FPGA hardware in Digital Design and optimizing complex voltage regulator circuits in Analog Design. Six winning teams were announced by Hon’ble Minister:

Winners of the Analog Design Hackathon:

1st Prize winner to the Team Intuition from IIT Delhi

2nd Prize Winner to Team Analog Edge from NIT Rourkela

3rd Prize Winner to Team FETManiacs from IIT Guwahati

Winners of the Digital Design Hackathon:

1st Prize winner to the Team RISCB from IIT Bombay

2nd Prize Winner to Team Silicon Scripters from Saveetha Engineering College

3rd Prize Winner to Team Daedalus from IIT (BHU Varanasi)

Vervesemi to Lead Indigenous Development

The indigenous development of the ‘BLDC Controller Chip’ was awarded to M/s Vervesemi Microelectronics Pvt. Ltd with following USP: 90% BOM made in India for self-reliant semiconductor solution, Complete power & control solution under $1.50 and Scalability at 10 million units/year.

  

Supporting BLDC and SR motors <200W

Next Big Leap

The launch of ‘Digital India RISC-V Processor’ was announced – to start inviting applications on 10^th April onwards. With VEGA Processors and SHAKTI Microprocessor at its core- the participants will tinker innovative applications. The ‘Digital India RISC-V Processor’ is technologically powered by VEGA Processor by C-DAC & SHAKTI Processor by IIT Madras with support from Renesas, LTSC, CoreEL Technologies and Bharat Electronics.

Chips to Start-up (C2S) Programme

India today presents a significant opportunity for aspiring entrepreneurs and researchers to be at the forefront of designing and redefining the semiconductor systems, devices and products of the future. “Chips to Start-up (C2S) Programme” of Government of India and MeitY in alignment with the nation’s unwavering commitment to building a robust and self-sustaining semiconductor ecosystem, is empowering the next generation of engineers, researchers and entrepreneurs to drive India’s technological advancements and propel the nation towards becoming a global powerhouse.